Intel MIC Programming Workshop (PRACE training course)

7 Feb 2017, 09:30 → 8 Feb 2017, 17:00 Europe/Prague

207 (VŠB - Technical University Ostrava, IT4Innovations building)

Summary and benefits for the attendees

The course discusses Intel’s Many Integrated Core (MIC) architecture. It covers various programming and optimisation techniques for Intel  Xeon Phi coprocessors. We will mainly focus on the KNC version of the chip. The hands-on sessions are done on the Intel Xeon Phi based Salomon system at the IT4Innovations National Supercomputing Center.

The afternoon of the second day will be devoted to a plenum session (see below) with invited talks about Intel Xeon Phi experience on Salomon.

The course is developed within the joint German-Czech project CzeBaCCA, as a follow-up of the course of February 2016. This project's workshop HPC in Atmosphere Modelling and Air Related Environmental Hazards will take place at IT4Innovations directly after this course, on February 9, 2017 - see its web page details.

It is organized as a joined event of the National Supercomputing Center IT4Innovations and the Leibniz Supercomputing Centre, which as a PRACE Advanced Training Centre provides high-level training for the Partnership for Advanced Computing in Europe (PRACE).

Level

intermediate

Language

English

Plenum Session

We are pleased to announce an open plenum session (no registration needed) in the afternoon (since 1 pm) on the second day (Wed 8 Februrary). Invited speakers will share with you their MIC experience and best practice recommendations on employing Intel Xeon Phi based systems like Salomon:

• Lukasz Szustak, Roman Wyrzykowski (TU Czestochowa): Exploring the impact of Intel MIC and Intel CPU architectures on accelerating scientific applications
• Jiri Jaros (VUT Brno): Acceleration of the k-Wave toolbox on Xeon Phi
• Milan Jaros (IT4Innovations): Acceleration of Blender Cycles Render Engine using Intel Xeon Phi
• Michal Merta (IT4Innovations): Acceleration of the ESPRESO domain decomposition library
• Jan Zapletal (IT4Innovations):Boundary element quadrature schemes for multi- and many-core architectures

For details of the plenum session, see the attachement below.

Acknowledgements

Course flyer

Links

• 0 Original web page of the course
• 1 Course web page at LRZ
• 2 Another course web page at LRZ
• 3 Course web page on the PRACE event portal
• 4 Workshop HPC in Atmosphere Modelling and Air Related Environmental Hazards
• 5 HPC in Atmosphere Modelling Workshop's web page at LRZ
• 6 Czech-Bavarian Competence Team for Supercomputing Applications (CzeBaCCA)
• 7 Anselm and Salomon documentation
• 8 Accommodation and transport recommendations (in English)
• 9 Transportation and accommodation - info for distant participants (in Czech)

Tuesday, 7 February

09:30 → 10:00 Registration

10:00 → 10:45 IT4Innovations - intro and IO hardware overview (Branislav Jansík, IT4Innovations)

10:45 → 11:45 General parallel IO strategies (Sebastian Lührs)

11:45 → 13:00 Lunch break

13:00 → 13:45 IO Profiling (Sebastian Lührs)

13:45 → 14:30 MPI-IO (Nicole Audiffren); Overview of MPI-IO (motivation, file view code, collective I/O, hints)

14:30 → 15:00 Coffee break

15:00 → 16:30 MPI-IO (Nicole Audiffren); Performance and ROMIO (hints)

16:30 → 17:00 Coffee break

17:00 → 18:00 MPI-IO (Nicole Audiffren); Hands-on

17:00 Coffee break

Wednesday, 8 February

09:00 → 10:30 HDF5 (Nicole Audiffren); Overview of basic HDF5 and API (manipulating HDF5 files, predefined datatypes, dataspaces and datasets, writing & reading data); Hands-on (serial HDF5)

10:30 → 11:00 coffee break

11:00 → 12:30 Parallel HDF5 (Nicole Audiffren); Overview (creating/accessing a file, writing and reading hyperslabs programming model); Hands-on: hyperslab example

12:30 → 13:30 lunch break

13:30 → 15:00 SIONlib (Sebastian Lührs); Introduction (motivation, SIONlib file format); Basic routines; Hands-on

15:00 → 15:30 coffee break

15:30 → 17:00 SIONlib (Sebastian Lührs); Advanced SIONlib features; Utility tools; Hands-on