- Indico style
- Indico style - inline minutes
- Indico style - numbered
- Indico style - numbered + minutes
- Indico Weeks View
With the petering-out of Moore's law and the end of Dennard's scaling, the pace dictated on the performance increase of High Performance Computing (HPC) Systems among generations has led to power constrained architectures and even higher importance of the efficient utilization of the computation resources than before. In addition, power consumption represents a significant cost factor in the overall HPC system economy. For those reasons in recent years, researchers, supercomputing centres and major vendors have developed new tools and methodologies to measure and optimise the energy consumption of large scale high performance system installation. The well-established performance analysis tools are continuously adapted and enhanced to fit the specifics of the emerging architectures. These tools can provide an in-depth view on the application behaviour and support the decisions in the energy efficiency aspects. A robust performance analysis methodology can guide the developers through the various performance metrics to identify the fundamental causes of the performance inefficiencies of their application, which can be exploited by the energy-efficiency runtime systems.
The course will offer an introduction to the fundamental concepts of performance, power consumption, and energy efficiency in HPC systems. Then it will focus on the performance analysis process and methodology developed during the POP project, followed by the mechanisms that today's computing elements and systems provide in terms of monitoring and control of power and energy dissipation. Finally, it will introduce and give hands-on sessions for a set of tools for performance analysis as well as reducing the energy consumption in HPC devices.
The course is organised into two main sessions, driving the audience through the performance analysis workflow including the basics of the POP methodology, the physical and engineering principles underlying power consumption in supercomputing systems, up to the practical usage of state-of-the-art tools for monitoring and controlling the energy efficiency of parallel applications. The tools that will be covered are Extrae, Paraver, Basic Analysis (all BSC), MSR-SAFE (LLNL), MERIC (IT4I).
By the end of the course, participants will:
The following background is expected from the participants:
Tools with graphical interface will be used during the course. Please, activate X-Window or install VNC (see e.g. IT4Innovations documentation) on your notebook before the training.
English
intermediate
Lubomír Říha is the Head of the Infrastructure Research Lab at IT4Innovations National Supercomputing Center. Previously he was a senior researcher in the Parallel Algorithms Research Lab at IT4Innovations, and a research scientist in the High Performance Computing Lab at George Washington University, ECE Department. He received his PhD and MSc degrees in Electrical Engineering from the Czech Technical University in Prague, the Czech Republic, in 2011, and his Ph.D. degree in Computer Science from Bowie State University, USA. Currently he is a local principal investigator of the H2020 Center of Excellence project POP2. Previously he was an investigator in the FP7 EXA2CT project and the Intel Parallel Computing Center, as well as a local principal investigator of the H2020-FET HPC READEX project. He is also co-principal developer of the ESPRESO finite element library, which includes a parallel sparse solver designed for supercomputers with tens or hundreds of thousands of cores, with support for both GPU and Intel Xeon Phi accelerators. His research interests are optimisation of HPC applications, energy efficient computing, acceleration of scientific and engineering applications using GPU and many-core accelerators, development of scalable linear solvers, parallel rendering on new HPC architectures, and signal and image processing.
Ondřej Vysocký received his M.Sc. degree in Computer Science from Brno University of Technology, Czech Republic in 2016. His master thesis focused on parallel I/O optimisation. Currently he is a PhD candidate at VSB – Technical University of Ostrava, Czech Republic, and he simultaneously works at IT4Innovations in the Infrastructure Research Lab. His research is focused on energy-efficiency in high performance computing. He was also an investigator of the Horizon 2020 READEX project, which deals with energy efficiency of High Performance Computing applications using dynamic tuning. Since that time, he develops a MERIC library, a runtime system for energy consumption measurement and hardware parameter tuning during parallel application runs.
Radim Vavřík is a Ph.D. student in Computational Science and a researcher in the IT4Innovations Infrastructure Research Lab. He is mainly interested in parallel computing, scalable algorithms design, GPU acceleration and code optimization, and heterogeneous architectures. He worked on hydrological and flood modelling software and high-performance heterogeneous platform for energy-efficient computing. Now, he works on GPU acceleration of the ESPRESO library and as a performance analyst in H2020 POP2 project.
Tomáš Panoc works as a research assistant and an internal doctoral student at Infrastructure Research Lab, IT4Innovations. He graduated in Computer Science at Faculty of Electrical Engineering and Computer Science, VSB - Technical University of Ostrava. He is involved in the ESPRESO and the POP2 projects. Tomas studies possibilities of automatic solver configuration optimization inside the ESPRESO library. Within the POP2 project, he engages in performance assessments and proof-of-concepts.
Matej Špeťko is a Ph.D. student and a research assistant at Infrastructure Research Lab, IT4Innovations. He graduated in Computer and Embedded systems at the Brno University of Technology. He contributed to the PRACE Enhancing HLST project where he collaborated with users of HPC systems to optimize the runtime of their applications. His research is focused on the analysis of HPC architectures in terms of performance and energy efficiency.
This event was partially supported by The Ministry of Education, Youth and Sports from the Large Infrastructures for Research, Experimental Development and Innovations project "e-Infrastruktura CZ – LM2018140“ and partially by the PRACE-6IP project - the European Union’s Horizon 2020 research and innovation programme under grant agreement No. 823767.
This course is supported by the Ministry of Education, Youth and Sports of the Czech Republic through the e-INFRA CZ (ID:90140).