[HYBRID] Introduction to HPC

207 (ONLINE and onsite)


ONLINE and onsite



This training is designed to equip participants with essential knowledge and skills to utilize the IT4Innovations (IT4I) supercomputing infrastructure effectively. Covering a spectrum of topics ranging from HPC system architecture to performance analysis basics, participants will gain insights into accessing, utilizing, and optimizing their computational workflows on high-performance clusters. Experienced instructors will facilitate each session, offering theoretical insights and hands-on exercises. Participants are encouraged to engage actively to maximize their learning experience.

Target Audience and Purpose of the Course:

This course is primarily crafted for application users with prior experience on smaller platforms, such as desktops, who now seek to leverage HPC capabilities to address problems surpassing the capabilities of their current resources. These users, often scientists from diverse fields, may not be developers of the applications they employ but require a deeper understanding of the underlying processes, particularly parallelization.

The course aims to offer participants an introduction to the key aspects of HPC, with a specific focus on the practices at IT4I, addressing their pertinent queries along the way. 






1. HPC systems architecture and IT4I architecture introduction  

Brief introduction to the High-Performance Computing (HPC) in the world and in the Czech Republic. Presenting hardware architecture of the contemporary HPC systems, and basics every HPC user should know, such as scalability, top500, path to exascale, or EPI. 

2. Accessing and using IT4I clusters

First login.
How to get your data to the cluster.
How to log in to the cluster and prepare a computation environment.
How to submit computational jobs. 

3. Code development on the cluster

Remote development on the cluster.
Compiling and building software tools and custom code.  


4. Parallel Programming Basics 

This section briefly describes how to run parallel applications that use threads and MPI. And, how to set the environment variables for a hybrid run to utilize the provided hardware efficiently. 


5. Leveraging accelerated hardware (GPUs)

In the GPU section of the course, attendees will understand the place of today’s GPUs in HPC. Their architecture will be introduced and compared with CPUs. Several GPU programming models will be briefly introduced, focusing on CUDA, and including a few hands-on exercises. 


6. Performance Analysis Basics

Why should we care about performance? This section will answer the question, introduce you to the basic concepts of a performance analysis, provide an overview of performance tools, and show how to start using them.



Ondřej Vysocký is a Ph.D. candidate at VSB – Technical University of Ostrava and, at the same time, works at IT4Innovations in the Infrastructure Research Lab. His research is focused on energy efficiency in high-performance computing. He was an investigator of the Horizon 2020 READEX project, which dealt with the energy efficiency of HPC applications using dynamic tuning. Since that time, he develops a MERIC library, tool for energy measurement and hardware parameters tuning during a parallel application run. 

Jakub Beránek is a researcher and a computer science Ph.D. student who works as a research assistant in the Advanced Data Analysis and Simulations Lab. He is interested in distributed systems, code optimization and profiling, GPUs, and applied machine learning. 

Ondřej Meca holds a PhD degree in Computer Science from VSB—Technical University of Ostrava, Czech Republic. He is currently a member of the Infrastructure Research Lab at IT4Innovations National Supercomputing Center. His research interests include verifying parallel algorithms, developing pre/post-processing algorithms for large-scale engineering problems, and developing highly scalable linear solvers. 

Jakub Homola is a PhD. student of Computational Science and a Research Assistant at IT4Innovations, VSB-TUO. He graduated in Computational and Applied Mathematics at VSB - Technical University of Ostrava, specializing in Computational Methods and HPC. His research and professional interests are FETI methods and GPU programming in CUDA, HIP and SYCL. He is partially involved in the EUPEX project, where he is working with the ESPRESO library to optimize it for future supercomputers with European processors. 

Radim Vavřík is a researcher in the Infrastructure Research Lab at IT4Innovations. He is interested in parallel computing, scalable algorithms design, GPU acceleration, code optimization, and performance analysis. He worked on a hydrological and flood modelling software, a high-performance heterogeneous platform for energy-efficient computing, a GPU acceleration of a highly parallel FEM library, and as a performance analyst in several EU CoEs and projects, including POP2, POP3, SPACE, and SCALABLE. 




This project has received funding from the European High-Performance Computing Joint Undertaking (JU) under grant agreement No 101101903. The JU receives support from the Digital Europe Programme and Germany, Bulgaria, Austria, Croatia, Cyprus, Czech Republic, Denmark, Estonia, Finland, Greece, Hungary, Ireland, Italy, Lithuania, Latvia, Poland, Portugal, Romania, Slovenia, Spain, Sweden, France, Netherlands, Belgium, Luxembourg, Slovakia, Norway, Türkiye, Republic of North Macedonia, Iceland, Montenegro, Serbia. This project has received funding from the Ministry of Education, Youth and Sports of the Czech Republic.

This course was supported by the Ministry of Education, Youth and Sports of the Czech Republic through the e-INFRA CZ (ID:90254).

Satisfaction Survey
    • 9:00 AM 10:30 AM
      HPC systems architecture and IT4I architecture introduction
    • 10:30 AM 10:45 AM
      Coffee Break 15m
    • 10:45 AM 12:15 PM
      Accessing and using IT4I clusters
    • 9:00 AM 9:45 AM
      Code development on the cluster
    • 9:45 AM 10:00 AM
      Coffee Break 15m
    • 10:00 AM 12:00 PM
      Parallel Programming Basics
    • 9:00 AM 10:30 AM
      Leveraging accelerated hardware (GPUs)
    • 10:30 AM 10:45 AM
      Coffee Break 15m
    • 10:45 AM 12:15 PM
      Performance Analysis Basics